The present invention relates generally to phase-locked loops, and more particularly to a phase-locked loop with a sync detection circuit.
A prior art sync detection circuit, as shown and described in U.S. Pat. No. 4,724,402 issued to K. A. Ireland, for a phase-locked loop operates on a one-to-one comparison between the rising or falling edge of the output of a voltage-controlled oscillator and the corresponding edge of an input pulse signal of the phase-locked loop. If two or more edges occur or no edges occur during the period of the input signal, the circuit recognizes that the phase-locked loop has entered an asynchronous condition and determines that it is serious if such condition should continue for several periods of the input signal.
Since it is necessary to monitor the asynchronous condition for several periods of the input signal before making a final decision, a delay is inevitably introduced. Since the degree of precision of a phase-locked loop is proportional to such delay time, a long period of time would be required to monitor the asynchronous condition to implement a high-precision-sync-detection circuit.